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titleExperimental verification of scan-architecture-based evaluation technique of SET and SEU soft-error rates at each flip-flop in logic VLSI systems
DOIinfo:doi/10.1109/TNS.2009.2020166
Reference URLhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5204655
Author(jpn)柳川, 善光; 小林, 大輔; 廣瀬, 和之; 牧野, 高紘; 齋藤, 宏文; 池田, 博一; 小野田, 忍; 平尾, 敏雄; 大島, 武
Author(eng)Yanagawa, Y.; Kobayashi, Daisuke; Hirose, Kazuyuki; Makino, T.; Saito, Hirobumi; Ikeda, Hirokazu; Onoda, S.; Hirao, T.; Ohshima, T.
Author Affiliation(jpn)東京大学; 宇宙航空研究開発機構宇宙科学研究本部(JAXA) (ISAS) : 総合研究大学院大学; 宇宙航空研究開発機構宇宙科学研究本部(JAXA) (ISAS) : 総合研究大学院大学; 総合研究大学院大学; 宇宙航空研究開発機構宇宙科学研究本部(JAXA) (ISAS) : 東京大学; 宇宙航空研究開発機構宇宙科学研究本部(JAXA) (ISAS) : 総合研究大学院大学; 日本原子力研究開発機構; 日本原子力研究開発機構; 日本原子力研究開発機構
Author Affiliation(eng)Department of Electronic Engineering, School of Engineering, The University of Tokyo; Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Graduate University for Advanced Studies; Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Graduate University for Advanced Studies; Graduate University for Advanced Studies; Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Department of Electronics Engineering, School of Engineering, The University of Tokyo; Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (JAXA)(ISAS) : Graduate University for Advanced Studies; Japan Atomic Energy Agency; Japan Atomic Energy Agency; Japan Atomic Energy Agency
Issue Date2009-08
PublisherInstitute of Electrical and Electronics Engineers
Inc.
Publication titleIEEE Transactions on Nuclear Science
Volume56
Issue4
Start page1958
End page1963
Publication date2009-08
Languageeng
Document TypeJournal Article
JAXA Category学術雑誌論文
ISSN0018-9499
NCIDAA00667999
SHI-NOSA1000801000
URIhttps://repository.exst.jaxa.jp/dspace/handle/a-is/34


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