| タイトル | Design of a massively parallel computer using bit serial processing elements |
| 本文（外部サイト） | http://hdl.handle.net/2060/19950015989 |
| 著者（英） | Khouri, Kamal S.; Piatt, Jason E.; Zheng, Jianqing; Aburdene, Maurice F. |
| 著者所属（英） | Bucknell Univ. |
| 発行日 | 1995-01-24 |
| 言語 | eng |
| 内容記述 | A 1-bit serial processor designed for a parallel computer architecture is described. This processor is used to develop a massively parallel computational engine, with a single instruction-multiple data (SIMD) architecture. The computer is simulated and tested to verify its operation and to measure its performance for further development. |
| NASA分類 | COMPUTER SYSTEMS |
| レポートNO | 95N22406
NASA-CR-197365
NAS 1.26:197365 |
| 権利 | No Copyright |
