| タイトル | Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders |
| 本文（外部サイト） | http://hdl.handle.net/2060/19940009920 |
| 著者（英） | Nguyen, T. M.; Yeh, H.-G. |
| 著者所属（英） | Jet Propulsion Lab., California Inst. of Tech. |
| 発行日 | 1993-08-15 |
| 言語 | eng |
| 内容記述 | The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described. |
| NASA分類 | COMMUNICATIONS AND RADAR |
| レポートNO | 94N14393 |
| 権利 | No Copyright |
