| タイトル | The formal verification of generic interpreters |
| 本文（外部サイト） | http://hdl.handle.net/2060/19910023539 |
| 著者（英） | Cohen, G. C.; Windley, P.; Levitt, K. |
| 著者所属（英） | California Univ. |
| 発行日 | 1991-10-01 |
| 言語 | eng |
| 内容記述 | The task assignment 3 of the design and validation of digital flight control systems suitable for fly-by-wire applications is studied. Task 3 is associated with formal verification of embedded systems. In particular, results are presented that provide a methodological approach to microprocessor verification. A hierarchical decomposition strategy for specifying microprocessors is also presented. A theory of generic interpreters is presented that can be used to model microprocessor behavior. The generic interpreter theory abstracts away the details of instruction functionality, leaving a general model of what an interpreter does. |
| NASA分類 | COMPUTER SYSTEMS |
| レポートNO | 91N32853
NASA-CR-4403
NAS 1.26:4403 |
| 権利 | No Copyright |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/130660 |
