タイトル | Parallelized reliability estimation of reconfigurable computer networks |
本文(外部サイト) | http://hdl.handle.net/2060/19910002117 |
著者(英) | Nicol, David M.; Palumbo, Dan; Das, Subhendu |
著者所属(英) | Institute for Computer Applications in Science and Engineering |
発行日 | 1990-09-01 |
言語 | eng |
内容記述 | A parallelized system, ASSURE, for computing the reliability of embedded avionics flight control systems which are able to reconfigure themselves in the event of failure is described. ASSURE accepts a grammar that describes a reliability semi-Markov state-space. From this it creates a parallel program that simultaneously generates and analyzes the state-space, placing upper and lower bounds on the probability of system failure. ASSURE is implemented on a 32-node Intel iPSC/860, and has achieved high processor efficiencies on real problems. Through a combination of improved algorithms, exploitation of parallelism, and use of an advanced microprocessor architecture, ASSURE has reduced the execution time on substantial problems by a factor of one thousand over previous workstation implementations. Furthermore, ASSURE's parallel execution rate on the iPSC/860 is an order of magnitude faster than its serial execution rate on a Cray-2 supercomputer. While dynamic load balancing is necessary for ASSURE's good performance, it is needed only infrequently; the particular method of load balancing used does not substantially affect performance. |
NASA分類 | COMPUTER SYSTEMS |
レポートNO | 91N11430 ICASE-90-60 NAS 1.26:182101 AD-A228180 NASA-CR-182101 |
権利 | No Copyright |
URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/135541 |
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