| タイトル | Fault-free validation of a fault-tolerant multiprocessor: Baseline experiments and workoad implementation |
| 本文（外部サイト） | http://hdl.handle.net/2060/19860014806 |
| 著者（英） | Segall, Z.; Feather, F.; Siewiorek, D. |
| 著者所属（英） | Carnegie-Mellon Univ. |
| 発行日 | 1986-04-01 |
| 言語 | eng |
| 内容記述 | In the future, aircraft employing active control technology must use highly reliable multiprocessors in order to achieve flight safety. Such computers must be experimentally validated before they are deployed. This project outlines a methodology for doing fault-free validation of reliable multiprocessors. The methodology begins with baseline experiments, which test single phenomenon. As experiments progress, tools for performance testing are developed. This report presents the results of interrupt baseline experiments performed on the Fault-Tolerant Multiprocessor (FTMP) at NASA-Langley's AIRLAB. Interrupt-causing excepting conditions were tested, and several were found to have unimplemented interrupt handling software while one had an unimplemented interrupt vector. A synthetic workload model for realtime multiprocessors is then developed as an application level performance analysis tool. Details of the workload implementation and calibration are presented. Both the experimental methodology and the synthetic workload model are general enough to be applicable to reliable multi-processors besides FTMP. |
| NASA分類 | COMPUTER SYSTEMS |
| レポートNO | 86N24277
NAS 1.26:178075
NASA-CR-178075 |
| 権利 | No Copyright |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/154273 |
