| タイトル | Self arbitrated VLSI asynchronous sequential circuits |
| 著者（英） | Maki, G.; Whitaker, S. |
| 著者所属（英） | Idaho Univ. |
| 発行日 | 1990-01-24 |
| 言語 | eng |
| 内容記述 | A new class of asynchronous sequential circuits is introduced in this paper. The new design procedures are oriented towards producing asynchronous sequential circuits that are implemented with CMOS VLSI and take advantage of pass transistor technology. The first design algorithm utilizes a standard Single Transition Time (STT) state assignment. The second method introduces a new class of self synchronizing asynchronous circuits which eliminates the need for critical race free state assignments. These circuits arbitrate the transition path action by forcing the circuit to sequence through proper unstable states. These methods result in near minimum hardware since only the transition paths associated with state variable changes need to be implemented with pass transistor networks. |
| NASA分類 | ELECTRONICS AND ELECTRICAL ENGINEERING |
| レポートNO | 94N71084 |
| 権利 | No Copyright |
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