| タイトル | Error latency measurements in symbolic architectures |
| 著者（英） | Young, L. T.; Iyer, R. K. |
| 著者所属（英） | Illinois Univ. |
| 発行日 | 1991-01-01 |
| 言語 | eng |
| 内容記述 | Error latency, the time that elapses between the occurrence of an error and its detection, has a significant effect on reliability. In computer systems, failure rates can be elevated during a burst of system activity due to increased detection of latent errors. A hybrid monitoring environment is developed to measure the error latency distribution of errors occurring in main memory. The objective of this study is to develop a methodology for gauging the dependability of individual data categories within a real-time application. The hybrid monitoring technique is novel in that it selects and categorizes a specific subset of the available blocks of memory to monitor. The precise times of reads and writes are collected, so no actual faults need be injected. Unlike previous monitoring studies that rely on a periodic sampling approach or on statistical approximation, this new approach permits continuous monitoring of referencing activity and precise measurement of error latency. |
| NASA分類 | COMPUTER SYSTEMS |
| レポートNO | 92A17667
AIAA PAPER 91-3823 |
| 権利 | Copyright |
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