| タイトル | Asymmetric Memory Circuit Would Resist Soft Errors |
| 著者（英） | Perlman, Marvin; Buehler, Martin G. |
| 著者所属（英） | Jet Propulsion Lab., California Inst. of Tech. |
| 発行日 | 1990-01-01 |
| 言語 | eng |
| 内容記述 | Some nonlinear error-correcting codes more efficient in presence of asymmetry. Combination of circuit-design and coding concepts expected to make integrated-circuit random-access memories more resistant to "soft" errors (temporary bit errors, also called "single-event upsets" due to ionizing radiation). Integrated circuit of new type made deliberately more susceptible to one kind of bit error than to other, and associated error-correcting code adapted to exploit this asymmetry in error probabilities. |
| NASA分類 | ELECTRONIC COMPONENTS AND CIRCUITS |
| レポートNO | 90B10004
NPO-17394 |
| 権利 | No Copyright |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/361106 |
