| タイトル | Room-temperature codeposition growth technique for pinhole reduction in epitaxial CoSi2 on Si (111) |
| 著者（英） | Lin, T. L.; Fathauer, R. W.; D'Anterroches, C.; Grunthaner, P. J. |
| 著者所属（英） | University of Southern California|Jet Propulsion Lab., California Inst. of Tech. |
| 発行日 | 1988-03-07 |
| 言語 | eng |
| 内容記述 | A solid-phase epitaxy has been developed for the growth of CoSi2 films on Si (111) with no observable pinholes (1000/sq cm detection limit). The technique utilizes room-temperature codeposition of Co and Si in stoichiometric ratio, followed by the deposition of an amorphous Si capping layer and subsequent in situ annealing at 550-600 C. CoSi2 films grown without the Si cap are found to have pinhole densities of (1-10) x 10 to the 7th/sq cm when annealed at similar temperatures. A CF4 plasma-etching technique was used to increase the visibility of the pinholes in the silicide layer. |
| NASA分類 | SOLID-STATE PHYSICS |
| レポートNO | 88A29293 |
| 権利 | Copyright |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/371974 |
