| タイトル | Addressable Inverter Matrix Tests Integrated-Circuit Wafer |
| 著者（英） | Buehler, Martin G. |
| 著者所属（英） | Jet Propulsion Lab., California Inst. of Tech. |
| 発行日 | 1988-02-01 |
| 言語 | eng |
| 内容記述 | Addressing elements indirectly through shift register reduces number of test probes. With aid of new technique, complex test structure on silicon wafer tested with relatively small number of test probes. Conserves silicon area by reduction of area devoted to pads. Allows thorough evaluation of test structure characteristics and of manufacturing process parameters. Test structure consists of shift register and matrix of inverter/transmission-gate cells connected to two-by-ten array of probe pads. Entire pattern contained in square area having only 1.6-millimeter sides. Shift register is conventional static CMOS device using inverters and transmission gates in master/slave D flip-flop configuration. |
| NASA分類 | ELECTRONIC COMPONENTS AND CIRCUITS |
| レポートNO | 88B10073
NPO-16612 |
| 権利 | No Copyright |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/375437 |
