タイトル | Implementation of the DAST ARW II control laws using an 8086 microprocessor and an 8087 floating-point coprocessor |
著者(英) | Berthold, G.; Abbott, L.; Kelly, G. L. |
著者所属(英) | Kansas Univ.|NASA Flight Research Center |
発行日 | 1982-01-01 |
言語 | eng |
内容記述 | A 5 MHZ single-board microprocessor system which incorporates an 8086 CPU and an 8087 Numeric Data Processor is used to implement the control laws for the NASA Drones for Aerodynamic and Structural Testing, Aeroelastic Research Wing II. The control laws program was executed in 7.02 msec, with initialization consuming 2.65 msec and the control law loop 4.38 msec. The software emulator execution times for these two tasks were 36.67 and 61.18, respectively, for a total of 97.68 msec. The space, weight and cost reductions achieved in the present, aircraft control application of this combination of a 16-bit microprocessor with an 80-bit floating point coprocessor may be obtainable in other real time control applications. |
NASA分類 | COMPUTER OPERATIONS AND HARDWARE |
レポートNO | 83A11910 |
権利 | Copyright |
URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/406944 |
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