| タイトル | Analyzing CMOS/SOS fabrication for LSI arrays |
| 著者（英） | Ipri, A. C. |
| 著者所属（英） | NASA Marshall Space Flight Center |
| 発行日 | 1978-10-01 |
| 言語 | eng |
| 内容記述 | Report discusses set of design rules that have been developed as result of work with test arrays. Set of optimum dimensions is given that would maximize process output and would correspondingly minimize costs in fabrication of large-scale integration (LSI) arrays. |
| NASA分類 | ELECTRONIC COMPONENTS AND CIRCUITS |
| レポートNO | 78B10158
MFS-23788 |
| 権利 | No Copyright |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/436013 |
