タイトル | Solid state zero-bias bilateral switch |
本文(外部サイト) | http://hdl.handle.net/2060/19670000558 |
著者(英) | Husted, J. M. |
発行日 | 1967-12-01 |
言語 | eng |
内容記述 | Circuit switches a plus or minus 2.5 volt peak, dc to 300 kHz input to an operational amplifier. Featured is a bilateral transistor which draws a saturation current of equal amplitude and opposite polarity to the saturation current of the bilateral transistor, cancelling the dc bias effect at the output. |
NASA分類 | ELECTRONIC COMPONENTS AND CIRCUITS |
レポートNO | 67B10559 GSC-532 |
権利 | No Copyright |
URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/503619 |