| タイトル | Multinode reconfigurable pipeline computer |
| 本文（外部サイト） | http://hdl.handle.net/2060/20080012372 |
| 著者（英） | Nosenchuck, Daniel M.; Littman, Michael G. |
| 著者所属（英） | Princeton Univ. |
| 発行日 | 1989-03-07 |
| 言語 | eng |
| 内容記述 | A multinode parallel-processing computer is made up of a plurality of innerconnected, large capacity nodes each including a reconfigurable pipeline of functional units such as Integer Arithmetic Logic Processors, Floating Point Arithmetic Processors, Special Purpose Processors, etc. The reconfigurable pipeline of each node is connected to a multiplane memory by a Memory-ALU switch NETwork (MASNET). The reconfigurable pipeline includes three (3) basic substructures formed from functional units which have been found to be sufficient to perform the bulk of all calculations. The MASNET controls the flow of signals from the memory planes to the reconfigurable pipeline and vice versa. the nodes are connectable together by an internode data router (hyperspace router) so as to form a hypercube configuration. The capability of the nodes to conditionally configure the pipeline at each tick of the clock, without requiring a pipeline flush, permits many powerful algorithms to be implemented directly. |
| NASA分類 | Computer Systems |
| 権利 | No Copyright |
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