| タイトル | An inductorless injection-locked PLL with 1/2- and 1/4-integral subharmonic locking in 90 nm CMOS |
| その他のタイトル | An inductorless injection-locked PLL with 1/2- and 1/4-integral subharmonic locking in 90 nm CMOS |
| 参考URL | http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100639467 |
| 著者（日） | 李, 尚曄; 池田, 翔; 伊藤, 浩之; 田野井, 聡; 石原, 昇; 益, 一哉 |
| 著者（英） | Lee, Sangyeop; Ikeda, Sho; Ito, Hiroyuki; Tanoi, Satoru; Ishihara, Noboru; Masu, Kazuya |
| 発行日 | 2012-06-26 |
| 刊行年月日 | 2012-06 |
| 言語 | en |
| 内容記述 | An inductorless PLL with 1/2- and 1/4-integral as well as integral subharmonic injection locking is realized, which can solve tradeoff between the selectable frequency step and phase noise of injection-locked PLLs (ILPLLs).The proposed ILPLL was fabricated in 90nm CMOS process (PLL area: 0.083mm2, tuning range: 1.1–2.0 GHz). For a 80MHz reference, it shows that the 1-MHz-offset phase noise is -106 dBc/Hz at 1.8 GHz (= 11:25 160 MHz) with injection.
A 15-dB reduction is achieved, compared with that in the case without injection. |
| キーワード | Injection locking, phase-locked loop, fractional-N, ring VCO, CMOS |
| 資料種別 | Conference Paper |
| URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/607484 |
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