タイトル | CSP: A Multifaceted Hybrid Architecture for Space Computing |
本文(外部サイト) | http://hdl.handle.net/2060/20150000168 |
著者(英) | Rudolph, Dylan; Wirthlin, Mike; Stewart, Jacob; Wilson, Alex; Lam, Herman; Gauvin, Patrick; George, Alan; Crum, Gary Alex; Wilson, Christopher; Stoddard, Aaron |
著者所属(英) | NASA Goddard Space Flight Center |
発行日 | 2014-08-02 |
言語 | eng |
内容記述 | Research on the CHREC Space Processor (CSP) takes a multifaceted hybrid approach to embedded space computing. Working closely with the NASA Goddard SpaceCube team, researchers at the National Science Foundation (NSF) Center for High-Performance Reconfigurable Computing (CHREC) at the University of Florida and Brigham Young University are developing hybrid space computers that feature an innovative combination of three technologies: commercial-off-the-shelf (COTS) devices, radiation-hardened (RadHard) devices, and fault-tolerant computing. Modern COTS processors provide the utmost in performance and energy-efficiency but are susceptible to ionizing radiation in space, whereas RadHard processors are virtually immune to this radiation but are more expensive, larger, less energy-efficient, and generations behind in speed and functionality. By featuring COTS devices to perform the critical data processing, supported by simpler RadHard devices that monitor and manage the COTS devices, and augmented with novel uses of fault-tolerant hardware, software, information, and networking within and between COTS devices, the resulting system can maximize performance and reliability while minimizing energy consumption and cost. NASA Goddard has adopted the CSP concept and technology with plans underway to feature flight-ready CSP boards on two upcoming space missions. |
NASA分類 | Computer Operations and Hardware; Electronics and Electrical Engineering |
レポートNO | GSFC-E-DAA-TN15946 |
権利 | Copyright, Distribution as joint owner in the copyright |
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