タイトル | ムーアの法則以降の新しい半導体メモリとトランジスタの技術動向 |
その他のタイトル | Trend of novel semiconductor memory and transistor for post Moore's low |
参考URL | http://id.nii.ac.jp/1266/00000576/ |
著者(日) | 渡辺, 重佳; 廣島, 佑; 玉井, 翔人; 横田, 智広; 佐藤, 匠 |
著者(英) | Watanabe, Shigeyoshi; Hiroshima, Yu; Tamai, Shoto; Yokota, Tomohiro; Sato, Takumi |
著者所属(日) | 湘南工科大学; 大井電気株式会社; 大井電気株式会社; 株式会社DNPデータテクノ; 湘南工科大学 |
著者所属(英) | Shonan Institute of Technology; Oi Electric Co.,Ltd.; Oi Electric Co.,Ltd.; DNP Data Techno Co., Ltd.; Shonan Institute of Technology |
発行日 | 2016-03-31 |
発行機関など | 湘南工科大学紀要委員会 Shonan Institute of Technology |
刊行物名 | 湘南工科大学紀要 Memoirs of Shonan Institute of Technology |
巻 | 50 |
号 | 1 |
開始ページ | 39 |
終了ページ | 47 |
刊行年月日 | 2016-03-31 |
言語 | jpn eng |
抄録 | Trend of novel semiconductor memory and transistor for post Moore's low have been described. For promising candidates for replacing presently available planar transistor are 3 dimensional transistors such as FinFET and SGT. Next candidate of FinFET is novel FinFET technology featured with plural number of trench depth with only one process step. Promising candidates of next generation memory are stacked type NAND flash memory and stacked type NAND new type memory which use SGT and BiCS technology. Especially, stacked type NAND new type memory has potential which replace not only high performance memory but also presently available system LSI. |
内容記述 | 形態: 図版あり Physical characteristics: Original contains illustrations |
キーワード | LSI; 3 dimensional transistor; FinFET; system LSI; MRAM; flash memory |
資料種別 | Departmental Bulletin Paper |
NASA分類 | Electronics and Electrical Engineering |
ISSN | 0919-2549 |
NCID | AN10400308 |
SHI-NO | AA1740002004 |
URI | https://repository.exst.jaxa.jp/dspace/handle/a-is/643373 |